Add Support for IREE Tests - #3
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… benchmark.hpp, remove simulator-dependent code, add returning code to spike sim
…port to IREE tests
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Todo list:
[0] %Error: fifo_v3.sv:149: Assertion failed in TOP.vproc_top.v_core.result_if.commit_id_fifo.empty_read: [ASSERT FAILED] [TOP.vproc_top.v_core.result_if.commit_id_fifo.empty_read] empty_read: Trying to pop data although the FIFO is empty. (/home/efectn/Desktop/vicuna_benchmark/vicuna2_benchmarking/rtl/vicuna2_core/pulp_common_cells/src/fifo_v3.sv:149) %Error: /home/efectn/Desktop/vicuna_benchmark/vicuna2_benchmarking/rtl/vicuna2_core/pulp_common_cells/src/fifo_v3.sv:149: Verilog $stopSince some vmfbss like toycar (around 6MB) is so big the RAM size should also be increased from linker script.
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